1. Field of the Invention
The present invention relates to an electroluminescence display device comprising an electroluminescence element and a thin film transistor.
2. Description of Prior Art
In recent years, electroluminescence (referred to herein after as xe2x80x9cELxe2x80x9d) display devices comprising EL elements have gained attention as potential replacements for CRTs and LCDs. Research has been directed to the development of EL display devices using, for example, thin film transistors (referred to hereinafter as xe2x80x9cTFTxe2x80x9d) as switching elements to drive the EL elements.
FIG. 1 is a plan view showing a display pixel of an organic EL display device. FIG. 2A shows a cross-sectional view taken along line Axe2x80x94A of FIG. 1 while FIG. 2B shows a cross-sectional view taken along line Bxe2x80x94B of FIG. 1.
As shown in these drawings, a display pixel 20 is formed in a region surrounded by a gate line GL and a data line DL. A first TFT serving as a switching element is disposed near an intersection of those lines. The source of the TFT 1 simultaneously functions as a second capacitor electrode 3 such that, together with a first capacitor electrode 2, it forms a capacitor 8. The source is connected to a gate electrode 15 of a second TFT 4 that drives the organic EL element. The source of the second TFT 4 contacts with an anode 6 of the organic EL element, while the drain of the TFT 4 is connected to a power source line (drive line) VL.
The first capacitor electrode 2, which is made of a material such as chromium, overlaps, over a gate insulating film 7, the second capacitor electrode 3 integral with the source of the first TFT 1. The first capacitor electrode 2 and the second capacitor electrode 3 together store charges with the gate insulating film 7 being interposed therebetween as a dielectric layer. The storage capacitor 8 serves to retain voltage applied to the gate electrodes 15 of the second TFT 4.
The first TFT 1, the switching TFT, will now be described.
First gate electrodes 11 made of refractory metal such as chromium (Cr) or molybdenum (Mo) are formed on a transparent insulator substrate 10 made of quartz glass, non-alkali glass, or a similar material. As shown in FIG. 1, the first gate electrodes 11 are integrally formed with the gate line GL such that a plurality of these electrodes extend from the gate line GL in the vertical direction in parallel with each other. Referring to FIG. 2A, the first capacitor electrode 2 formed in the same process as that of the first gate electrodes 11 is provided to the right side of the first gate electrodes 11. This first capacitor electrode 2, which constitutes the storage capacitor 8, has an enlarged portion between the first TFT 1 and the second TFT 4 as shown in FIG. 1 and is integral with a storage capacitor line CL extending therefrom in the directions.
A first active layer 12 composed of poly-silicon (referred to hereinafer as xe2x80x9cp-Sixe2x80x9d) film is formed on the gate insulating film 7. The first active layer 12 is of a so-called LDD (Lightly Doped Drain) structure. Specifically, low-concentration regions are formed on both sides of the gate. Source and drain regions, which are high-concentration regions, are further disposed on the outboard sides of the low-concentration regions. On the first active layer 12, a stopper insulating film 13 made of Si oxidation film is formed so as to prevent ions from entering the first active layer 12.
An interlayer insulating film 14 formed by sequential lamination of a SiO2 film, a SiN film, and a SiO2 film is provided on the entire surface over the gate insulating film 7, the active layer 12, and the stopper insulating film 13. The data line DL which functions as a drain electrode is electrically connected, through a contact hole C1 formed in the interlayer insulating film, 14, to the drain in the active layer 12. A planarizing insulating film 18 made, for example, of an insulating organic resin is also formed over the entire surface for planarization.
In EL display devices which are driven by an electric current, the EL layers must have a uniform thickness. Otherwise, current concentration may occur in a portion of the layer having thinner thickness. Thus, a significantly high level of planarity is required at least in portions where the EL elements are to be formed, and therefore the above-described planarizing film 18 made of a material having fluidity prior to hardening is employed.
The second TFT 4 which drives the organic EL element will be described with reference to FIGS. 1 and 2B.
On the insulating substrate 10, second gate electrodes 15 made of the same material as the first gate electrodes 11 are provided, and a second active layer 16 is further formed on the gate insulating film 7. Then, a stopper insulating film 17 is formed on the second active layer 16 in a manner similar to the above-mentioned stopper insulating film 13.
Intrinsic or substantially intrinsic channels are formed in the second active layer 16 above the gate electrodes 15, and source and drain regions are formed on respective sides of these channels by doping p-type impurities, thereby constituting a p-type channel TFT.
The above-described interlayer insulating film 14 is provided on the entire surface over the gate insulating film 7 and the second active layer 16, and the power source line VL is electrically connected, through a contact hole C2 formed in the interlayer insulating film 14, to the drain in the active layer 16. Further, the planarizing film 18 is formed over the entire surface, such that the source is exposed through a contact hole C3 formed in the planarizing film 18 and the interlayer insulating film 14. A transparent electrode made of ITO (Indium Tin Oxide) that contacts the source through this contact hole C3, namely, the anode 6 of the organic EL element 20, is formed on the planarizing insulating film 18.
The organic EL element 20 is formed by laminating, in order, the anode 6, an emissive element layer EM comprising a first hole transport layer 21, a second hole transport layer 22, an emissive layer 23 and an electron transport layer 24, and a cathode 25 made of a magnesium-indium alloy. The cathode 25 is substantially disposed over the entire surface of the organic EL elements.
The principle and operation for light emission of the organic EL element is as follows. Holes injected from the anode 6 and electrons injected from the cathode 25 recombine in the emissive layer 23, to thereby excite organic molecules constituting the emissive layer 23, thereby generating excitons. Through the process in which these excitons undergo radiation until deactivation, light is emitted from the emissive layer. This light radiates outward through the transparent anode via the transparent insulator substrate and resultant light emission is observed.
However, the power source line (drive line) VL shown in FIG. 1 for driving the organic EL element is connected to a power source input terminal (not shown) provided at a position external to the display pixel area, and connected to each of the display pixels arranged in the column direction (vertical direction in the figure). Therefore, as the power source line VL extends farther away from the power source input terminal, its line resistance increases along with the distance from the terminal. As a result, voltage drops along the line, and organic EL elements for display pixels located distant from the power source input terminal do not receive the intended current. This results in a problem that variation in luminance is generated in the display area in the direction where the current is supplied by the power source line VL.
Increasing the width of the power source line VL in order to prevent voltage drop leads to an increase in display pixel size, and, therefore, in the area of the EL display device. On the other hand, in order to increase the width of the power source line VL without changing the overall size of the EL display device, the light emissive area must be reduced, leading to a decrease in display luminance.
The present invention has been conceived in view of the above-described problems, and provides an EL display device enabling suppression of a decrease in power source current by reducing the resistance of a power source line. A current of the value that should be supplied to an EL element can be provided to all display pixels, thereby achieving a bright and uniform display.
The present invention is characterized in that a data line and a power source line are provided on opposite sides of display pixels arranged in a matrix, and that the display pixels adjoining each other share the power source line.
According to another aspect of the invention, a data line is provided on the side of the display pixel opposite to the side where two display pixels adjoin each other with said shared power source line is provided between said adjoining pixels.
According to a still another aspect of the present invention, an EL display device includes a plurality of display pixels, each comprising an EL element having an emissive layer between an anode and a cathode, a first thin film transistor having a first conductive region (drain or source) of an active layer formed of a semiconductor film connected to a data line, and a gate electrode connected to a gate line, and a second thin film transistor having a third conductive region (drain or source) of an active layer formed of the semiconductor film connected to a power source line for the EL element, a gate electrode electrically connected to a second conductive region (source or drain) of the first thin film transistor, and a fourth conductive region (source or drain) connected to the EL element, wherein the power source line is provided between first and second display pixels disposed adjoining each other.
According to a further aspect of the present invention, the adjoining first and second display pixels in the above EL display device are formed symmetrically about the power source line.
According to a further aspect of the present invention, the width of the power source line in the above EL display device is greater than that of the data line.
As described above, a power source line is disposed between the two adjoining display pixels, and shared by these display pixels to drive both pixels. As a result, in contrast to the case where a power source line is provided for each pixel, a single line can supply current to two pixels. In addition, such a shared line can have a width at least twice that of a conventional power source line. While sufficient space is required between a power source line and a data line for preventing a short circuit and the like when these lines are provided side by side, space can be saved because the data line is provided on the side opposite to the side where the two pixels adjoin, and therefore the shared line can have an increased width.
The power source line extends in the column direction of the matrix, and is connected to each of the display pixels arranged in the column direction for supplying a driving current to, for example, an EL element. Because the power source line over the entire display area is quite long, line resistance is generated. In the present invention, however, a wide line shared by two adjoining display pixels is provided, and connected to thin film transistors and EL elements, so that line resistance is reduced, along with corresponding voltage drop. Consequently, an organic EL element provided for each display pixel can receive a current at the value that should be supplied, achieving a bright and consistent display over the entire display area, and preventing degradation in display and decrease in brightness of the display.
Because a single line is shared by two display pixels, the number of intersections between this line and the gate lines for two pixels is reduced from four in the conventional device to two. As a result, short circuit between layers of the gate line and the shared line (power source line), deterioration in withstand voltage, and the like can all be suppressed.
As described above, the present invention makes it possible to construct an EL display device allowing suppression of an increase in resistance with increased length of the power source line and supplying an electric current at the value that should be supplied to an EL element of each display pixel to prevent variation in luminance.
When the shared line is designed to have a same width Wd as a conventional power source line, reduction in display pixel size and improvement in pixel density can be achieved because one power source line can be eliminated for every two display pixels.